Argirios Sideris

Orcid: 0000-0002-6252-426X

According to our database1, Argirios Sideris authored at least 16 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2023
Enhancing the Hardware Pipelining Optimization Technique of the SHA-3 via FPGA.
Comput., August, 2023

A Novel Hardware Architecture for Enhancing the Keccak Hash Function in FPGA Devices.
Inf., 2023

A Robust Hybrid Deep Convolutional Neural Network for COVID-19 Disease Identification from Chest X-ray Images.
Inf., 2023

Accelerate Processing of Image with the Keccak-512 Algorithm on Cryptoprocessor.
Proceedings of the 8th South-East Europe Design Automation, 2023

Acceleration of GANs for Potato Crop Disease Identification via FPGA.
Proceedings of the 8th South-East Europe Design Automation, 2023

An Efficiency CNN Solution for Olive Disease Management Through FPGA.
Proceedings of the 8th South-East Europe Design Automation, 2023

Efficient Categorization of Pneumonia Diagnosis Using Low-Power Embedded Devices.
Proceedings of the 8th South-East Europe Design Automation, 2023

A Lightweight CNN Model for Tomato Crop Diseases on Heterogeneous Embedded System.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

2022
A heterogeneous implementation for plant disease identification using deep learning.
Multim. Tools Appl., 2022

High Throughput of Image Processing with Keccak Algorithm using Microprocessor on FPGA.
Proceedings of the 7th South-East Europe Design Automation, 2022

Radiography Images with Transfer Learning on Embedded System.
Proceedings of the 7th South-East Europe Design Automation, 2022

2021
A Heterogeneous Lightweight Network for Plant Disease Classification.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

2020
A Heterogeneous Implementation of the Sobel Edge Detection Filter Using OpenCL.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Accelerating the AES Algorithm using OpenCL.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

High Throughput Pipelined Implementation of the SHA-3 Cryptoprocessor.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2019
Hardware Acceleration of SHA-256 Algorithm Using NIOS-II Processor.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019


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