Ashish Kumar

Orcid: 0000-0001-9428-3598

Affiliations:
  • STMicroelectronics, Greater Noida, UP, India


According to our database1, Ashish Kumar authored at least 4 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2017
A 0.065-mm<sup>2</sup> 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB.
IEEE J. Solid State Circuits, 2017

2016
A 0.065mm<sup>2</sup> 19.8mW single channel calibration-free 12b 600MS/s ADC in 28nm UTBB FDSOI using FBB.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2008
A 1.2v 11b 100Msps 15mW ADC realized using 2.5b pipelined stage followed by time interleaved SAR in 65nm digital CMOS process.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
20mW, 125 Msps, 10 bit Pipelined ADC in 65nm Standard Digital CMOS Process.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007


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