Babak Nejati

According to our database, Babak Nejati authored at least 6 papers between 2001 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor.

Alberto Cicalini, Sankaran Aniruddhan, Rahul Apte, Frederic Bossu, Ojas Choksi, Dan Filipovic, Kunal Godbole, Tsai-Pi Hung, Christos Komninakis, David Maldonado, Chiewcharn Narathong, Babak Nejati, Deirdre O'Shea, Xiaohong Quan, Raj Rangarajan, Janakiram Sankaranarayanan, Andrew See, Ravi Sridhara, Bo Sun, Wenjun Su, Klaas van Zalinge, Gang Zhang, Kamal Sahota

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2007

Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters.

Babak Nejati, Larry Larson

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

An Area Optimized 2.5-V 10-b 200-MS/s 200-μA CMOS DAC.

Babak Nejati, Lawrence Larson

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2004

Systematic design of the pipelined analog-to-digital converter with radix<2.

Babak Nejati, Omid Shoaei

Microelectron. J., 2004

A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter.

Babak Nejati, Omid Shoaei

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2001

A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS.

Babak Nejati, Omid Shoaei

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001