Bahareh Pourshirazi

According to our database1, Bahareh Pourshirazi authored at least 9 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2020
DeepSwapper: A Deep Learning Based Page Swap Management Scheme for Hybrid Memory Systems.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
Writeback-Aware LLC Management for PCM-Based Main Memory Systems.
ACM Trans. Design Autom. Electr. Syst., 2019

2018
WALL: A writeback-aware LLC management for PCM-based main memory systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
NEMO: an energy-efficient hybrid main memory system for mobile devices.
Proceedings of the International Symposium on Memory Systems, 2017

2016
Refree: A Refresh-Free Hybrid DRAM/PCM Main Memory System.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

2014
Application-aware virtual paths insertion for NOCs.
Microelectron. J., 2014

2013
An Energy-Efficient Reconfigurable NoC Architecture with RF-Interconnects.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
DBR: A Simple, Fast and Efficient Dynamic Network Reconfiguration Mechanism Based on Deadlock Recovery Scheme
CoRR, 2012

RF-Interconnect Resource Assignment and Placement Algorithms in Application Specific ICs to Improve Performance and Reduce Routing Congestion.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012


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