Bernd Klauer

According to our database1, Bernd Klauer authored at least 45 papers between 1991 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2022
Transfering Run-Time-Data Between Distinct FPGA Designs - Solutions in the Context of an ANC-Application.
Proceedings of the IECON 2022, 2022

2021
A Modern Approach to Application Specific Processors for Improving the Security of Embedded Devices.
Proceedings of the IECON 2021, 2021

Exponential sine sweep measurement implementation targeting FPGA platforms.
Proceedings of the International Conference on Field-Programmable Technology, 2021

A Flexible Multi-Channel Feedback FxLMS Architecture for FPGA Platforms.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020
Unifying Timer and Interrupt Management for an ARM-RISC-V-Heterogeneous Multi-Core.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

2019
Context Save and Restore of Partial Reconfiguration Regions for Xilinx FPGAs.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

HDL FSM Code Generation Using a MIPS-based Assembler.
Proceedings of the 28th IEEE International Symposium on Industrial Electronics, 2019

A Parameterizable Feedback FxLMS Architecture for FPGA Platforms.
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019

2018
Low-Latency FIR Filter Structures Targeting FPGA Platforms.
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

2017
New attack vectors for building automation and IoT.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

Wireless sensor/actuator device configuration by NFC with secure key exchange.
Proceedings of the IEEE AFRICON 2017, Cape Town, South Africa, September 18-20, 2017, 2017

2016
Operating System Concepts for Reconfigurable Computing: Review and Survey.
Int. J. Reconfigurable Comput., 2016

A threat-model for building and home automation.
Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

CloudSynth - Outsourcing hardware synthesis into the cloud.
Proceedings of the IECON 2016, 2016

Wireless sensor/actuator device configuration by NFC.
Proceedings of the IEEE International Conference on Industrial Technology, 2016

2015
Clock speed optimization of runtime reconfigurable systems by signal latency measurement.
Proceedings of the IECON 2015, 2015

2013
Hardware Based Security Enhanced Direct Memory Access.
Proceedings of the Communications and Multimedia Security, 2013

2011
Multicore reconfiguration platform an alternative to RAMPSoC.
SIGARCH Comput. Archit. News, 2011

2010
Konrad-Zuse-Workshop. Rechnender Raum und Zellulare Automaten (Vorwort).
Proceedings of the 40. Jahrestagung der Gesellschaft für Informatik, Service Science - Neue Perspektiven für die Informatik, INFORMATIK 2010, Leipzig, Germany, September 27, 2010

A Computer Architecture with Hardwarebased Malware Detection.
Proceedings of the ARES 2010, 2010

2009
List of Criteria for a Secure Computer Architecture.
Proceedings of the Third International Conference on Emerging Security Information, 2009

2006
Unsupervised Segmentation of Naval Infrared Images through a Markov Random Field Model.
Proceedings of the 2006 International Conference on Image Processing, 2006

2005
Extraction of Ship Silhouettes Using Active Contours from Infrared Images.
Proceedings of The 2005 International Conference on Computer Vision, 2005

2004
The SDVM: A Self Distributing Virtual Machine for Computer Clusters.
Proceedings of the Organic and Pervasive Computing, 2004

2002
SDAARC: An Extended Cache-Only Memory Architecture.
IEEE Micro, 2002

The CDAG: A Data Structure for Automatic Parallelization for a Multithreaded Architecture.
Proceedings of the 10th Euromicro Workshop on Parallel, 2002

2001
The SDAARC Architecture.
Proceedings of the Ninth Euromicro Workshop on Parallel and Distributed Processing, 2001

2000
Tailoring a self-distributing architecture to a cluster computer environment.
Proceedings of the Eight Euromicro Workshop on Parallel and Distributed Processing, 2000

1999
Hybrides Scheduling.
Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

Prozessorarchitekturen für J2K.
Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

1998
Combining Static Partitioning with Dynamic Distribution of Threads.
Proceedings of the Distributed and Parallel Embedded Systems, 1998

Automatic Scheduling for Cache Only Memory Architectures.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

1997
What computer architecture can learn from computational intelligence-and vice versa.
Proceedings of the 23rd EUROMICRO Conference '97, 1997

A Combined Virtual Shared Memory and Network which Schedules.
Proceedings of the IASTED International Conference on Parallel and Distributed Systems, 1997

Compiler Technology for Two Novel Computer Architectures.
Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1996
Neural Compiler Technology for a Parallel Architecture.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

ADARC: A New Multi-Instruction Issue Approach.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

Mapping of Neural Networks onto Data Flow Graphs.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

1995
The AM<sup>3</sup> associative processor.
IEEE Micro, 1995

An associative communication network for fine and large grain dataflow.
Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), 1995

Assoziative Methoden zur Mustererkennung.
PhD thesis, 1995

1993
Pen-based recognizing of handprinted characters.
Microprocess. Microprogramming, 1993

The MHD Memory.
Proceedings of the Mustererkennung 1993, 1993

An Object-Oriented Pen-Based Recognizer for Handprinted Characters.
Proceedings of the Computer Analysis of Images and Patterns, 5th International Conference, 1993

1991
Möglichkeiten zur Parallelisierung des Error-Backpropagation Algorithmus.
Proceedings of the Physik und Informatik, 1991


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