Bhawna Rawat

Orcid: 0000-0001-5953-0477

According to our database1, Bhawna Rawat authored at least 5 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Reconfigurable 7T SRAM Bit Cell for High Speed, Power Saving and Low Voltage Application.
ACM Trans. Design Autom. Electr. Syst., November, 2023

A Switching NMOS Based Single Ended Sense Amplifier for High Density SRAM Applications.
ACM Trans. Design Autom. Electr. Syst., 2023

2022
Tetra-variate scrutiny of diverse multiplexer techniques for designing a barrel shifter for low power digital circuits.
Microprocess. Microsystems, April, 2022

A Reliable and Temperature Variation Tolerant 7T SRAM Cell with Single Bitline Configuration for Low Voltage Application.
Circuits Syst. Signal Process., 2022

2021
Single bit line accessed high-performance ultra-low voltage operating 7T static random access memory cell with improved read stability.
Int. J. Circuit Theory Appl., 2021


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