Bumkil Lee

According to our database, Bumkil Lee authored at least 4 papers between 2017 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A 20 MHz On-Chip All-NMOS 3-Level DC-DC Converter With Interception Coupling Dead-Time Control and 3-Switch Bootstrap Gate Driver.

Bumkil Lee, Dongsheng Brian Ma

IEEE Trans. Ind. Electron., 2021

2019

A 25-MHz Four-Phase SAW Hysteretic Control DC-DC Converter With 1-Cycle Active Phase Count.

Bumkil Lee, Min Kyu Song, Ashis Maity, Dongsheng Brian Ma

IEEE J. Solid State Circuits, 2019

A 10-MHz 14.3W/mm² DAB Hysteretic Control Power Converter Achieving 2.5W/247ns Full Load Power Flipping and above 80% Efficiency in 99.9% Power Range for 5G IoTs.

Kang Wei, Bumkil Lee, Dongsheng Brian Ma

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2017

10.7 A 25MHz 4-phase SAW hysteretic DC-DC converter with 1-cycle APC achieving 190ns tsettle to 4A load transient and above 80% efficiency in 96.7% of the power range.

Bumkil Lee, Min Kyu Song, Ashis Maity, Dongsheng Brian Ma

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017