César W. V. Casañas

According to our database, César W. V. Casañas authored at least 3 papers between 2022 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

An 1-μA, 25 ppm/°C, PVT resilient resistor-less CMOS current reference.

César W. V. Casañas, Atila Alvandpour, Alireza Saberkari, André F. Ponchet, Robson L. Moreno, Osamu Saotome, Ingemar Söderquist, Lucas Compassi Severo

Microelectron. J., 2025

2024

Analysis and Design of a Reconfigurable RF-DC Rectifier for RF Energy Harvesting Systems.

André F. Ponchet, Javad Bagheri Asli, Alireza Saberkari, César W. V. Casañas, Atila Alvandpour, Ingemar Söderquist, Osamu Saotome

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

2022

Low power current comparator circuit using a cascode transistor structure for bias generation.

César W. V. Casañas, Gabriel Antonio Fanelli de Souza, Osamu Saotome, Robson L. Moreno

Microelectron. J., 2022