Lucas C. Severo

Orcid: 0000-0002-3092-4023

According to our database1, Lucas C. Severo authored at least 25 papers between 2013 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Low-Power CMOS DC-DC Converter for Artificial Light Energy Harvesting.
Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

A Tradeoff-Based Sizing Methodology for Low-Power ULV RF LNTAs Using LUT Approach.
Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

2025
An 1-μA, 25 ppm/°C, PVT resilient resistor-less CMOS current reference.
Microelectron. J., 2025

A 125-kHz 4th-order Continuous-Time Sigma-Delta Modulator with Single Amplifier Resonator.
Proceedings of the 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2025

A 5.8-GHz ULV Active-Biased LNTA Designed using Tradeoff-Based Biasing Metric.
Proceedings of the 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2025

A Versatile and Easy-to-Use Python-Based EDA Tool for Analog and RF Schematic Level IC Design.
Proceedings of the IEEE International Conference on RFID Technology and Applications, 2025

2024
Variable Conversion Approach for Design Optimization of Low-Voltage Low-Pass Filters.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024

A Negative Resistance-Based ULV Variable-Gain OTA for Low-Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

A 5-V 125-kHz Fourth-Order Continuous-Time Sigma-Delta Modulator in 130-nm BCD Technology.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

A Semi-Automated Sizing Tool for CMOS Analog Building Blocks Integrated into EDA Environment.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

Design of Low-Power 5.8-GHz ULV LNTAs using Normalized Biasing Metric.
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

A Low-Voltage Low-Power 20-Msps 3-Bit Rail-to-Rail Flash ADC.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

A 5.8-GHz RF VCO-Based Sensing System with Integrated RF Energy Harvesting in CMOS 65-nm for Health Monitoring Applications.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

2023
Evaluation and Comparison of Offset Compensation Techniques for a Multi-Stage Comparator.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

A Fast Cold-Start Integrated System for Ultra-Low Voltage SC Energy-Harvesting Circuits.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

An RF-EH Employing Controlled-Impedance Matching for Ultra-Low Voltage Batteryless Devices.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
A 0.3 to 5-MHz Low-Voltage Digitally-Controlled Oscillator for Energy Harvesting Applications.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

2020
A Novel Fully Integrated ULV SC DC-DC Converter for Indoor Light Energy Harvesting.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

2019
A 0.4-V 10.9- $\mu$ W/Pole Third-Order Complex BPF for Low Energy RF Receivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
0.5V 1OMS/S 9-Bits Asynchronous SAR ADC for BLE Receivers in L80NM CMOS Technology.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

A 10.9-μW/pole 0.4-V active-RC complex BPF for Bluetooth low energy RF receivers.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2017
Current mode 1.2-Gbps SLVS transceiver for readout front-end ASIC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
A digitally tunable 4th-order Gm-C low-pass filter for multi-standards receivers.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2015
Testing fully differential amplifiers using common mode feedback circuit: A case study.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

2013
A methodology for the automatic design of operational amplifiers including yield optimization.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013


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