Chaoyang Jia

According to our database, Chaoyang Jia authored at least 5 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

TSN Cache: Exploiting Data Localities in Graph Computing Applications.

Chaoyang Jia, Jingyu Liu, Shi Chen, Kai Lu, Li Shen

ACM Trans. Archit. Code Optim., June, 2025

2022

Compressed page walk cache.

Dunbo Zhang, Chaoyang Jia, Li Shen

Frontiers Comput. Sci., 2022

2021

Reducing TLB Miss Penalty on GPUs via Unified Multi-level PWB and PWC.

Yang Lin, Dunbo Zhang, Chaoyang Jia, Qiong Wang, Li Shen

Proceedings of the 12th International Symposium on Parallel Architectures, 2021

Multi-level PWB and PWC for Reducing TLB Miss Overheads on GPUs.

Yang Lin, Dunbo Zhang, Chaoyang Jia, Qiong Wang, Li Shen

Proceedings of the Algorithms and Architectures for Parallel Processing, 2021

2020

A Unified Page Walk Buffer and Page Walk Cache.

Dunbo Zhang, Chaoyang Jia, Qiong Wang, Li Shen

Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2020