Chessda Uttraphan

According to our database, Chessda Uttraphan authored at least 3 papers between 2014 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Optimizing FPGA-based YOLO series accelerators: A survey of techniques.

Chua Wee Heng, Chessda Uttraphan, Chew Chang Choon, Kok Boon Ching

Neurocomputing, 2025

2017

An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts.

Chessda Uttraphan, Nasir Shaikh-Husin, Mohamed Khalil Hani

Turkish J. Electr. Eng. Comput. Sci., 2017

2014

An optimization algorithm for simultaneous routing and buffer insertion with delay-power constraints in VLSI layout design.

Chessda Uttraphan, Nasir Shaikh-Husin, Mohamed Khalil Hani

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014