Chia-Wei Yen

According to our database1, Chia-Wei Yen authored at least 7 papers between 2008 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2018
A 12-bit 40-MS/s SAR ADC With a Fast-Binary-Window DAC Switching Scheme.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A 12-bit 10-MS/s SAR ADC with a binary-window DAC switching scheme in 180-nm CMOS.
Int. J. Circuit Theory Appl., 2018

2017
An 11-bit 100-MS/s Subranged-SAR ADC in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A 12-bit 160-MS/s ping-pong subranged-SAR ADC in 65nm CMOS.
Proceedings of the International SoC Design Conference, 2017

2016
A 24- μW 12-bit 1-MS/s SAR ADC With Two-Step Decision DAC Switching in 110-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A PVT-tracking metastability detector for asynchronous ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2008
Event-based knowledge extraction from free-text descriptions for art images by using semantic role labeling approaches.
Electron. Libr., 2008


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