Christopher T. Johnston

Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

Algorithm Transformation for FPGA Implementation.

[BibT_eX]

[DOI]

Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

2009

User evaluation and overview of a visual language for real time image processing on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 10th ACM SIGCHI New Zealand Chapter's International Conference on Computer-Human Interaction, 2009

2008

Optimised single pass connected components analysis.

[BibT_eX]

[DOI]

Ni Ma

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Connected components analysis of streamed images.

[BibT_eX]

[DOI]

Ni Ma

Proceedings of the FPL 2008, 2008

A Visual Notation for Processor and Resource Scheduling.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

FPGA implementation of a Single Pass Connected Components Algorithm.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2006

A Visual Environment for Real-Time Image Processing in Hardware (VERTIPH).

[BibT_eX]

[DOI]

Paul John Lyons

EURASIP J. Embed. Syst., 2006

Using Design Patterns to Overcome Image Processing Constraints on FPGAs.

[BibT_eX]

[DOI]

K. T. Gribbon

Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

GATOS: A Windowing Operating System for FPGAs.

[BibT_eX]

[DOI]

K. T. Gribbon

Montree Siripruchyanun

Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

Towards a visual notation for pipelining in a visual programming language for programming FPGAs.

[BibT_eX]

[DOI]