Chun-Pang Wu

According to our database, Chun-Pang Wu authored at least 4 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A 300KHz bandwidth 3.9GHz 0.18μm CMOS fractional-N synthesizer with 13dB broadband phase noise reduction.

Chun-Pang Wu, Sheng-Sian Wang, Hen-Wai Tsao, Jingshown Wu

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010

A novel sigma-delta fractional-N synthesizer architecture with fractional spur and quantization noise cancellation.

Chun-Pang Wu, Hen-Wai Tsao, Jingshown Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2005

A 110-MHz 84-dB CMOS programmable gain amplifier with integrated RSSI function.

Chun-Pang Wu, Hen-Wai Tsao

IEEE J. Solid State Circuits, 2005

2004

A 100 MHz timing generator for impulse radio applications.

Chun-Pang Wu, Hen-Wai Tsao

Proceedings of the 33rd European Solid-State Circuits Conference, 2004