Chyi-Shiang Hoo

According to our database, Chyi-Shiang Hoo authored at least 4 papers between 2013 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

Cost reduction in bottom-up hierarchical-based VLSI floorplanning designs.

Chyi-Shiang Hoo, Kanesan Jeevan, Harikrishnan Ramiah

Int. J. Circuit Theory Appl., 2015

2014

Enumeration technique in very large-scale integration fixed-outline floorplanning.

Chyi-Shiang Hoo, Kanesan Jeevan, Harikrishnan Ramiah

IET Circuits Devices Syst., 2014

2013

Hierarchical congregated ant system for bottom-up VLSI placements.

Chyi-Shiang Hoo, Hock-Chai Yeo, Kanesan Jeevan, Velappa Ganapathy, Harikrishnan Ramiah, Irfan Anjum Badruddin

Eng. Appl. Artif. Intell., 2013

Variable-Order Ant System for VLSI multiobjective floorplanning.

Chyi-Shiang Hoo, Kanesan Jeevan, Velappa Ganapathy, Harikrishnan Ramiah

Appl. Soft Comput., 2013