Corey Tessler

Affiliations:
  • University of Nevada, Las Vegas, NV, USA
  • Wayne State University, Detroit, MI, USA (former, PhD 2019)


According to our database1, Corey Tessler authored at least 11 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing.
Proceedings of the IEEE Real-Time Systems Symposium, 2023

2020
Bringing Inter-Thread Cache Benefits to Federated Scheduling - Extended Results & Technical Report.
CoRR, 2020

Bringing Inter-Thread Cache Benefits to Federated Scheduling.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

2019
NPM-BUNDLE: Non-Preemptive Multitask Scheduling for Jobs with BUNDLE-Based Thread-Level Scheduling (Artifact).
Dagstuhl Artifacts Ser., 2019

NPM-BUNDLE: Non-Preemptive Multitask Scheduling for Jobs with BUNDLE-Based Thread-Level Scheduling.
Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

2018
BUNDLEP: Prioritizing Conflict Free Regions in Multi-Threaded Programs to Improve Cache Reuse - Extended Results and Technical Report.
CoRR, 2018

BUNDLEP: Prioritizing Conflict Free Regions in Multi-threaded Programs to Improve Cache Reuse.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

2017
Work-in-Progress: Reducing Cache Conflicts via Interrupts and BUNDLE Scheduling.
Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

2016
BUNDLE: Real-Time Multi-threaded Scheduling to Reduce Cache Contention.
Proceedings of the 2016 IEEE Real-Time Systems Symposium, 2016

Poster Abstract: Scheduling Multi-Threaded Tasks to Reduce Intra-Task Cache Contention.
Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

2015
Minimizing Cache Overhead via Loaded Cache Blocks and Preemption Placement.
Proceedings of the 27th Euromicro Conference on Real-Time Systems, 2015


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