D. Malathi

According to our database, D. Malathi authored at least 7 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Design of Low Power Multiplier with Less Area Using Quaternary Carry Increment Adder for New-Fangled Processors.

K. Gavaskar, D. Malathi, G. Ravivarma, P. S. Priyatharshan, S. Rajeshwari, B. Sanjay

Wirel. Pers. Commun., 2023

2022

A Variant of Long Multiplication Design with Low Power and Area Using Modified 7: 3 Compressor for Biomedical Applications.

K. Gavaskar, D. Malathi, G. Ravivarma, V. Krithika Devi, M. Megala, S. Megaraj Begam

Wirel. Pers. Commun., 2022

A Fresh Design of Power Effective Adapted Vedic Multiplier for Modern Digital Signal Processors.

K. Gavaskar, D. Malathi, G. Ravivarma, V. Krithika Devi, M. Megala, S. Megaraj Begam

Wirel. Pers. Commun., 2022

2019

Energy Efficient Lightweight Mutual Authentication Protocol (REAP) for MBAN Based on Genus-2 Hyper-Elliptic Curve.

N. Sasikaladevi, D. Malathi

Wirel. Pers. Commun., 2019

Privacy preserving light weight authentication protocol (LEAP) for WBAN by exploring Genus-2 HEC.

N. Sasikaladevi, D. Malathi

Multim. Tools Appl., 2019

2015

A 4 bit medium speed flash ADC using inverter based comparator in 0.18μm CMOS.

D. Malathi, R. Greeshma, R. Sanjay, B. Venkataramani

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

Solving Data Sparsity by Morphology Injection in Factored SMT.

Sreelekha S, Piyush Dungarwal, Pushpak Bhattacharyya, D. Malathi

Proceedings of the 12th International Conference on Natural Language Processing, 2015