Daesik Park

According to our database¹, Daesik Park authored at least 2 papers between 2009 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2025

A 28 nm AI microcontroller with tightly coupled zero-standby power weight memory featuring standard logic compatible 4 Mb 4-bits/cell embedded flash technology.

[BibT_eX]

[DOI]

CoRR, March, 2025

2009

Simple Design of Detector in the Presence of Frequency Offset for IEEE 802.15.4 LR-WPANs.

[BibT_eX]

[DOI]

Daesik Park

Chester Sungchung Park

Kwyro Lee

IEEE Trans. Circuits Syst. II Express Briefs, 2009

Daesik Park

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