David E. Muller

According to our database1, David E. Muller authored at least 35 papers between 1954 and 1995.

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Bibliography

1995
Simulating Alternating Tree Automata by Nondeterministic Automata: New Results and New Proofs of the Theorems of Rabin, McNaughton and Safra.
Theor. Comput. Sci., 1995

1992
Alternating Automata, the Weak Monadic Theory of Trees and its Complexity.
Theor. Comput. Sci., 1992

Parallel Restructuring and Evaluation of Expressions.
J. Comput. Syst. Sci., 1992

Finite State Processes, Z-Temporal Logic and the Monadic Theory of the Integers.
Int. J. Found. Comput. Sci., 1992

On the Decidability of the Linear Z-Temporal Logic and the Monadic Second Order Theory.
Proceedings of the Computing and Information, 1992

1990
On the Complexity of omega-Tree Sets and Nerode Theorem.
Int. J. Found. Comput. Sci., 1990

1988
Weak Alternating Automata Give a Simple Explanation of Why Most Temporal and Dynamic Logics are Decidable in Exponential Time
Proceedings of the Third Annual Symposium on Logic in Computer Science (LICS '88), 1988

1987
Alternating Automata on Infinite Trees.
Theor. Comput. Sci., 1987

Toward a switching theory of CMOS circuits.
Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow, 1987

1986
Alternating Automata. The Weak Monadic Theory of the Tree, and its Complexity.
Proceedings of the Automata, Languages and Programming, 13th International Colloquium, 1986

1985
The Theory of Ends, Pushdown Automata, and Second-Order Logic.
Theor. Comput. Sci., 1985

1984
Alternating automata on infinite objects, determinacy and Rabin's theorem.
Proceedings of the Automata on Infinite Words, 1984

1983
Groups, the Theory of Ends, and Context-Free Languages.
J. Comput. Syst. Sci., 1983

1981
Pushdown Automata, Graphs, Ends, Second-Order Logic, and Reachability Problems
Proceedings of the 13th Annual ACM Symposium on Theory of Computing, 1981

1979
Finding the Intersection of n Half-Spaces in Time O(n log n).
Theor. Comput. Sci., 1979

1978
Finding the Intersection of two Convex Polyhedra.
Theor. Comput. Sci., 1978

1977
Reduction of Depth of Boolean Networks with a Fan-In Constraint.
IEEE Trans. Computers, 1977

1976
Efficient Parallel Evaluation of Boolean Expression.
IEEE Trans. Computers, 1976

Restructuring of Arithmetic Expressions For Parallel Evaluation.
J. ACM, 1976

1975
Bounds to Complexities of Networks for Sorting and for Switching.
J. ACM, 1975

The Time Required to Evaluate Division-Free Arithmetic Expressions.
Inf. Process. Lett., 1975

1972
A Generalization of the Theory of Incompletely Specified Machines.
J. Comput. Syst. Sci., 1972

1971
On the Delay Required to Realize Boolean Functions.
IEEE Trans. Computers, 1971

1970
Generation of Near-Optimal Universal Boolean Functions.
J. Comput. Syst. Sci., 1970

Connectivity and Reversibility in Automata.
J. ACM, 1970

1968
Frequency of Decomposability among Machines with a Large Number of States.
J. Comput. Syst. Sci., 1968

Use of Multiple Index Matrices in Generalized Automata Theory
Proceedings of the 9th Annual Symposium on Switching and Automata Theory, 1968

1967
The General Synthesis Problem for Asynchronous Digital Networks
Proceedings of the 8th Annual Symposium on Switching and Automata Theory, 1967

1965
Reversibility in monadic algebras and automata
Proceedings of the 6th Annual Symposium on Switching Circuit Theory and Logical Design, 1965

1964
The place of logical design and switching theory in the computer curriculum.
Commun. ACM, 1964

1963
Infinite sequences and finite machines
Proceedings of the 4th Annual Symposium on Switching Circuit Theory and Logical Design, 1963

1960
A Method for Factoring the Action of Asynchronous Circuits
Proceedings of the 1st Annual Symposium on Switching Circuit Theory and Logical Design, 1960

1959
Treatment of transition signals in electronic switching circuits by algebraic methods.
IRE Trans. Electron. Comput., 1959

1956
Complexity in Electronic Switching Circuits.
IRE Trans. Electron. Comput., 1956

1954
Application of Boolean algebra to switching circuit design and to error detection.
Trans. I R E Prof. Group Electron. Comput., 1954


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