David E. Wallace

According to our database, David E. Wallace authored at least 4 papers between 1986 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1997

Effective Coupling Between Logic Synthesis and Layout Tools for Synthesis of Area and Speed-Efficient Circuits.

Mandalagiri S. Chandrasekhar, Robert H. McCharles, David E. Wallace

VLSI Design, 1997

1990

High-Level Delay Estimation for Technology-Independent Logic Equations.

David E. Wallace, Mandalagiri S. Chandrasekhar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1988

ATV: An Abstract Timing Verifier.

David E. Wallace, Carlo H. Séquin

Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988

1986

Plug-in timing models for an abstract timing verifier.

David E. Wallace, Carlo H. Séquin

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986