David J. Greaves

According to our database1, David J. Greaves authored at least 37 papers between 1990 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Research Note: An Open Source Bluespec Compiler.
CoRR, 2019

Further sub-cycle and multi-cycle schedulling support for Bluespec Verilog.
Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2019

FRAMER: a tagged-pointer capability system with memory safety applications.
Proceedings of the 35th Annual Computer Security Applications Conference, 2019

2018
FRAMER: A Cache-friendly Software-based Capability Model.
CoRR, 2018

2017
Kiwi scientific acceleration at large: Incremental compilation and multi-FPGA HLS demo.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Value State Flow Graph: A Dataflow Compiler IR for Accelerating Control-Intensive Code in Spatial Hardware.
ACM Trans. Reconfigurable Technol. Syst., 2016

2015
Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL.
Proceedings of the 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2015

A toolchain for safety-critical embedded processor programming using FPGAs.
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015

2014
A New Dataflow Compiler IR for Accelerating Control-Intensive Code in Spatial Hardware.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013
Open-VSeSeMe: A Middleware for Efficient Vehicular Sensor Processing.
Proceedings of the Communication Technologies for Vehicles, 5th International Workshop, 2013

Achieving Superscalar Performance without Superscalar Overheads - A Dataflow Compiler IR for Custom Computing.
Proceedings of the 2013 Imperial College Computing Student Workshop, 2013

2012
TLM POWER3: Power Estimation Methodology for SystemC TLM 2.0.
Proceedings of the Models, Methods, and Tools for Complex Chip Design, 2012

2011
Distributing C# methods and threads over Ethernet-connected FPGAs using Kiwi.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

2010
Designing application specific circuits with concurrent C# programs.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Controlling Real World Pervasive Environments with Knowledge Bases.
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2010

Synthesis of Glue Logic, Transactors, Multiplexors and Serialisors from Protocol Specifications.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

Intra-vehicular verification and control: A two-pronged approach.
Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010

2009
Complex open-system design by quasi-agents: process-oriented modeling in agent-based systems.
ACM SIGSOFT Softw. Eng. Notes, 2009

2008
Checkable Domain Management with Ontology and Rules.
Proceedings of the Third International Conference on Internet and Web Applications and Services, 2008

Using C# Attributes to Describe Hardware Artefacts within Kiwi.
Proceedings of the Forum on specification and Design Languages, 2008

Kiwi: Synthesis of FPGA Circuits from Parallel Programs.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Synthesizing FPGA Circuits from Parallel Programs.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2006
Using Simple Pushlogic.
Proceedings of the WEBIST 2006, 2006

Avoiding two-level systems: Using a textual environment to address cross-cutting concerns.
Proceedings of the ICSOFT 2006, 2006

2004
Automated Hardware Synthesis from Formal Specification Using SAT Solvers.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

2002
Control Software for Home Automation, Design Aspects and Position Paper.
Proceedings of the 22nd International Conference on Distributed Computing Systems, 2002

2001
Internet Access to a Home Area Network.
IEEE Internet Comput., 2001

Communication Primitives for Ubiquitous Systems or RPC Considered Harmful.
Proceedings of the 21st International Conference on Distributed Computing Systems Workshops (ICDCS 2001 Workshops), 2001

2000
A Verilog to C Compiler.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000

1998
Warren: a low-cost ATM home area network.
IEEE Netw., 1998

1996
Securing the Residential Asynchronous Transfer Mode Networks.
Proceedings of the Security Protocols, 1996

1995
The CSYN Verilog Compiler and Other Tools.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1994
Protocol and Interface for ATM LANs.
J. High Speed Networks, 1994

A Modular Approach to Low Cost Networked Multimedia.
Proceedings of the Hot Interconnects II, 1994

1993
The Cambridge Backbone Network An Overview and Preliminary Performance.
Comput. Networks ISDN Syst., 1993

1992
Private ATM Networks.
Proceedings of the Protocols for High-Speed Networks III, 1992

1990
The Cambridge Backbone Ring.
Proceedings of the Proceedings IEEE INFOCOM '90, 1990


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