David L. Rhodes

Orcid: 0000-0001-9244-8707

According to our database1, David L. Rhodes authored at least 12 papers between 1997 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
A New Vertex Connectivity Metric.
CoRR, 2021

2016
Efficient Multistate Route Computation.
IEEE Trans. Netw. Sci. Eng., 2016

2014
A -90 dBm Sensitivity Wireless Transceiver Using VCO-PA-LNA-Switch-Modulator Co-Design for Low Power Insect-Based Wireless Sensor Networks.
IEEE J. Solid State Circuits, 2014

2001
RAGS-real-analysis ALAP-guided synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Two CoNP-Complete Schedule Analysis Problems.
Int. J. Found. Comput. Sci., 2001

2000
A Scheduling Approach to Parallel Harmonic Balance Simulation.
Concurr. Pract. Exp., 2000

1999
Unbalanced Cache Systems.
Proceedings of the 7th IEEE International Workshop on Memory Technology, 1999

Scalable Parallelization of Harmonic Balance Simulation.
Proceedings of the Parallel and Distributed Processing, 1999

Co-synthesis of heterogeneous multiprocessor systems using arbitrated communication.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Overhead effects in real-time preemptive schedules.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1998
TGFF: task graphs for free.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

1997
Allocation and Data Arrival Design of Hard Real-time Systems.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997


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