Deepak D'Souza

Orcid: 0000-0002-6629-6604

According to our database1, Deepak D'Souza authored at least 67 papers between 1999 and 2024.

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Bibliography

2024
Weakest Precondition Inference for Non-Deterministic Linear Array Programs.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

Maximal Quantified Precondition Synthesis for Linear Array Loops.
Proceedings of the Programming Languages and Systems, 2024

2023
Verification of Camera-Based Autonomous Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

Towards Efficient Controller Synthesis Techniques for Logical LTL Games.
CoRR, 2023

Symbolic Fixpoint Algorithms for Logical LTL Games.
Proceedings of the 38th IEEE/ACM International Conference on Automated Software Engineering, 2023

Data-Driven Learning of Strong Conjunctive Invariants.
Proceedings of the Formal Methods in Computer-Aided Design, 2023

2022
BNSynth: Bounded Boolean Functional Synthesis.
CoRR, 2022

Static executes-before analysis for event driven programs.
Proceedings of the 30th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2022

Static Race Detection for Periodic Programs.
Proceedings of the Programming Languages and Systems, 2022

2021
Static analysis for detecting high-level races in RTOS kernels.
Formal Methods Syst. Des., 2021

GenSys: a scalable fixed-point engine for maximal controller synthesis over infinite state spaces.
Proceedings of the ESEC/FSE '21: 29th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2021

Specification synthesis with constrained Horn clauses.
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021

On the Expressive Equivalence of TPTL in the Pointwise and Continuous Semantics.
Proceedings of the 41st IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, 2021

2020
A Thread-Local Semantics and Efficient Static Analyses for Race Free Programs.
CoRR, 2020

Verifying Band Convergence for Sampled Control Systems.
Proceedings of the NASA Formal Methods - 12th International Symposium, 2020

Static Race Detection for RTOS Applications.
Proceedings of the 40th IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, 2020

Verification of a Generative Separation Kernel.
Proceedings of the Automated Technology for Verification and Analysis, 2020

2019
Static Analysis for Detecting High-Level Races in RTOS Kernels.
Proceedings of the Formal Methods - The Next 30 Years - Third World Congress, 2019

Data Races and Static Analysis for Interrupt-Driven Kernels.
Proceedings of the Programming Languages and Systems, 2019

2018
Horn-ICE learning for synthesizing invariants and contracts.
Proc. ACM Program. Lang., 2018

2017
Presburger-Definable Parameterized Typestates.
CoRR, 2017

Special issue on the 16th International Conference on Verification, Model Checking, and Abstract Interpretation.
Comput. Lang. Syst. Struct., 2017

Detecting All High-Level Dataraces in an RTOS Kernel.
Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2017

Thread-Local Semantics and Its Efficient Sequential Abstractions for Race-Free Programs.
Proceedings of the Static Analysis - 24th International Symposium, 2017

RATCOP: Relational Analysis Tool for Concurrent Programs.
Proceedings of the Hardware and Software: Verification and Testing, 2017

2016
Model-checking trace-based information flow properties for infinite-state systems.
J. Comput. Secur., 2016

An Optimization Approach for Matching Textual Domain Models with Existing Code.
Proceedings of the 2016 IEEE International Conference on Software Maintenance and Evolution, 2016

2015
Using formal reasoning on a model of tasks for FreeRTOS.
Formal Aspects Comput., 2015

Refinement-Based Verification of the FreeRTOS Scheduler in VCC.
Proceedings of the Formal Methods and Software Engineering, 2015

2014
Efficient Refinement Checking in VCC.
Proceedings of the Verified Software: Theories, Tools and Experiments, 2014

A multi-core version of FreeRTOS verified for datarace and deadlock freedom.
Proceedings of the Twelfth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2014

2013
Using relationships for matching textual domain models with existing code.
Proceedings of the 20th Working Conference on Reverse Engineering, 2013

2012
Temporal Logics of Repeating Values.
J. Log. Comput., 2012

A Compositional Hierarchical Monitoring Automaton Construction for LTL.
Proceedings of the Theoretical Aspects of Computing - ICTAC 2012, 2012

Model-Checking Bisimulation-Based Information Flow Properties for Infinite State Systems.
Proceedings of the Computer Security - ESORICS 2012, 2012

Scalable Flow-Sensitive Pointer Analysis for Java with Strong Updates.
Proceedings of the ECOOP 2012 - Object-Oriented Programming, 2012

Automata and Logics over Signals.
Proceedings of the Modern Applications of Automata Theory., 2012

2011
Model-checking trace-based information flow properties.
J. Comput. Secur., 2011

Dataflow Analysis for Datarace-Free Programs.
Proceedings of the Programming Languages and Systems, 2011

2010
Conflict-Tolerant Real-Time Specifications in Metric Temporal Logic.
Proceedings of the TIME 2010, 2010

WOMM: A Weak Operational Memory Model.
Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

Analysing Message Sequence Graph Specifications.
Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

Conflict-tolerant specifications in temporal logic.
Proceedings of the Proceeding of the 3rd Annual India Software Engineering Conference, 2010

A case study in matching service descriptions to implementations in an existing system.
Proceedings of the 26th IEEE International Conference on Software Maintenance (ICSM 2010), 2010

2009
Automata and logics over finitely varying functions.
Ann. Pure Appl. Log., 2009

Supervisory control for real-time systems based on conflict-tolerant controllers.
Proceedings of the IEEE Conference on Automation Science and Engineering, 2009

2008
Conflict-Tolerant Real-Time Features.
Proceedings of the Fifth International Conference on the Quantitative Evaluaiton of Systems (QEST 2008), 2008

Java memory model aware software validation.
Proceedings of the 8th ACM SIGPLAN-SIGSOFT Workshop on Program Analysis for Software Tools and Engineering, 2008

On the Decidability of Model-Checking Information Flow Properties.
Proceedings of the Information Systems Security, 4th International Conference, 2008

Conflict-Tolerant Features.
Proceedings of the Computer Aided Verification, 20th International Conference, 2008

2007
On the expressiveness of MTL in the pointwise and continuous semantics.
Int. J. Softw. Tools Technol. Transf., 2007

An automata-theoretic approach to constraint LTL.
Inf. Comput., 2007

A Decidable Temporal Logic of Repeating Values.
Proceedings of the Logical Foundations of Computer Science, International Symposium, 2007

Counter-Free Input-Determined Timed Automata.
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2007

2006
Computing Complete Test Graphs for Hierarchical Systems.
Proceedings of the Fourth IEEE International Conference on Software Engineering and Formal Methods (SEFM 2006), 2006

On Continuous Timed Automata with Input-Determined Guards.
Proceedings of the FSTTCS 2006: Foundations of Software Technology and Theoretical Computer Science, 2006

On the Expressiveness of MTL with Past Operators.
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2006

2005
An Automata Based Approach for Verifying Information Flow Properties.
Proceedings of the Second Workshop on Automated Reasoning for Security Protocol Analysis, 2005

Eventual Timed Automata.
Proceedings of the FSTTCS 2005: Foundations of Software Technology and Theoretical Computer Science, 2005

Fault Diagnosis Using Timed Automata.
Proceedings of the Foundations of Software Science and Computational Structures, 2005

2004
On Timed Automata with Input-Determined Guards.
Proceedings of the Formal Techniques, 2004

2003
A Logical Characterisation of Event Clock Automata.
Int. J. Found. Comput. Sci., 2003

Checking Consistency of SDL+MSC Specifications.
Proceedings of the Model Checking Software, 2003

Timed Control with Partial Observability.
Proceedings of the Computer Aided Verification, 15th International Conference, 2003

2002
Timed Control Synthesis for External Specifications.
Proceedings of the STACS 2002, 19th Annual Symposium on Theoretical Aspects of Computer Science, Antibes, 2002

2000
A Logical Characterisation of Event Recording Automata.
Proceedings of the Formal Techniques in Real-Time and Fault-Tolerant Systems, 2000

1999
Product Interval Automata: A Subclass of Timed Automata.
Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1999


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