Desheng Zhang
Orcid: 0000-0001-9174-8011Affiliations:
- Wuhan University of Technology, Wuhan, China
According to our database1,
Desheng Zhang authored at least 7 papers
between 2025 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
An Adaptive Three-Stage GaN Gate Driver With Peak Miller Plateau Voltage Tracking and Voltage Tailing Suppression for 36.4% Switching Loss Reduction.
IEEE J. Solid State Circuits, April, 2026
A Cross-Cycle Dynamic Active Gate Driver to Minimize Turn-Off Loss With Reduced Spike and dv/dt for SiC MOSFETs.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026
A Novel PFM Control Chip with Model-Based Duty Ratio Prediction and vds-Sensed Fine Tuning for Optimal ZVS in VHF Resonant SEPIC Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
A Multi-Stage SiC Gate Driver Utilizing Peak/Valley Miller Plateau Voltage Tracking for 48.4% Switching Loss Reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
An Exponential-Decaying Current Gate Driver Achieving Ultra-Low Voltage Overshoot and 29.2% Cycle Loss Reduction for 1200V SiC MOSFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
A Σ-Structure Ripple-Cancellation Switching Regulator with Automatic Ripple Calibration Achieving Sub-mV Output Voltage Ripple.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
2025
A High-Ratio Hybrid Converter With Uniform Capacitor Voltage and Reconfigured Inductive TVC for 100 V PoL on Satellite.
IEEE Trans. Ind. Electron., May, 2025