Diego Andrade
Orcid: 0000-0001-5670-7425
  According to our database1,
  Diego Andrade
  authored at least 42 papers
  between 2003 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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    on orcid.org
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Bibliography
  2025
    Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2025
    
  
  2024
    IEEE Access, 2024
    
  
    Proceedings of the Euro-Par 2024: Parallel Processing Workshops, 2024
    
  
  2023
    Proceedings of the International Conference for High Performance Computing, 2023
    
  
  2022
The New UPC++ DepSpawn High Performance Library for Data-Flow Computing with Hybrid Parallelism.
    
  
    Proceedings of the Computational Science - ICCS 2022, 2022
    
  
Probing the Efficacy of Hardware-Aware Weight Pruning to Optimize the SpMM Routine on Ampere GPUs.
    
  
    Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022
    
  
  2021
    Comput. Math. Methods, November, 2021
    
  
    J. Supercomput., 2021
    
  
    Clust. Comput., 2021
    
  
  2020
Reusing Trained Layers of Convolutional Neural Networks to Shorten Hyperparameters Tuning Time.
    
  
    CoRR, 2020
    
  
    CoRR, 2020
    
  
  2019
    IEEE Trans. Parallel Distributed Syst., 2019
    
  
    IEEE Access, 2019
    
  
  2018
    Concurr. Comput. Pract. Exp., 2018
    
  
Guiding the Optimization of Parallel Codes on Multicores Using an Analytical Cache Model.
    
  
    Proceedings of the Computational Science - ICCS 2018, 2018
    
  
  2017
High productivity multi-device exploitation with the Heterogeneous Programming Library.
    
  
    J. Parallel Distributed Comput., 2017
    
  
Facilitating the development of stencil applications using the Heterogeneous Programming Library.
    
  
    Concurr. Comput. Pract. Exp., 2017
    
  
  2016
    Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016
    
  
  2015
Developing adaptive multi-device applications with the Heterogeneous Programming Library.
    
  
    J. Supercomput., 2015
    
  
    Proceedings of the International Conference on Computational Science, 2015
    
  
  2014
    Microprocess. Microsystems, 2014
    
  
    Concurr. Comput. Pract. Exp., 2014
    
  
    Proceedings of the Euro-Par 2014 Parallel Processing, 2014
    
  
  2013
Numerical simulation of pollutant transport in a shallow-water system on the Cell heterogeneous processor.
    
  
    J. Supercomput., 2013
    
  
    Parallel Comput., 2013
    
  
    Proceedings of the International Conference on Computational Science, 2013
    
  
  2012
Static analysis of the worst-case memory performance for irregular codes with indirections.
    
  
    ACM Trans. Archit. Code Optim., 2012
    
  
Using an Analytical Model of Shared Caches for Selecting the Optimal Parallelization Scheme.
    
  
    Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012
    
  
  2011
    Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011
    
  
  2010
    IEEE Trans. Ind. Informatics, 2010
    
  
  2009
Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information.
    
  
    Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009
    
  
    Proceedings of the 17th Euromicro International Conference on Parallel, 2009
    
  
  2007
Precise automatable analytical modeling of the cache behavior of codes with indirections.
    
  
    ACM Trans. Archit. Code Optim., 2007
    
  
Automated and accurate cache behavior analysis for codes with irregular access patterns.
    
  
    Concurr. Comput. Pract. Exp., 2007
    
  
  2006
    J. Syst. Archit., 2006
    
  
    Proceedings of the Languages and Compilers for Parallel Computing, 2006
    
  
  2005
Optimal Tile Size Selection Guided by Analytical Models.
  
    Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005
    
  
  2004
Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures.
    
  
    Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004
    
  
  2003
    Proceedings of the Software and Compilers for Embedded Systems, 7th International Workshop, 2003