Diego Andrade

Proceedings of the Computational Science - ICCS 2022, 2022

Probing the Efficacy of Hardware-Aware Weight Pruning to Optimize the SpMM Routine on Ampere GPUs.

[BibT_eX]

[DOI]

Roberto L. Castro

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021

A software cache autotuning strategy for dataflow computing with UPC++ DepSpawn.

[BibT_eX]

[DOI]

Comput. Math. Methods, November, 2021

High-performance dataflow computing in hybrid memory systems with UPC++ DepSpawn.

[BibT_eX]

[DOI]

J. Supercomput., 2021

ScalaParBiBit: scaling the binary biclustering in distributed-memory systems.

[BibT_eX]

[DOI]

Jorge González-Domínguez

Clust. Comput., 2021

2020

An automatic optimizer for heterogeneous devices.

[BibT_eX]

[DOI]

Jorge Fernández-Fabeiro

Ramón Doallo

Future Gener. Comput. Syst., 2020

Reusing Trained Layers of Convolutional Neural Networks to Shorten Hyperparameters Tuning Time.

[BibT_eX]

[DOI]

Roberto L. Castro

CoRR, 2020

A Hybrid Approach for Tracking Individual Players in Broadcast Match Videos.

[BibT_eX]

[DOI]

Roberto L. Castro

CoRR, 2020

2019

Easy Dataflow Programming in Clusters with UPC++ DepSpawn.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2019

A Fast Solver for Large Tridiagonal Systems on Multi-Core Processors (Lass Library).

[BibT_eX]

[DOI]

IEEE Access, 2019

2018

Heterogeneous distributed computing based on high-level abstractions.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2018

Guiding the Optimization of Parallel Codes on Multicores Using an Analytical Cache Model.

[BibT_eX]

[DOI]

Ramón Doallo

Proceedings of the Computational Science - ICCS 2018, 2018

2017

High productivity multi-device exploitation with the Heterogeneous Programming Library.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2017

Facilitating the development of stencil applications using the Heterogeneous Programming Library.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2017

2016

Writing a performance-portable matrix multiplication.

[BibT_eX]

[DOI]

Jorge F. Fabeiro

Parallel Comput., 2016

Towards a High Level Approach for the Programming of Heterogeneous Clusters.

[BibT_eX]

[DOI]

Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016

2015

Developing adaptive multi-device applications with the Heterogeneous Programming Library.

[BibT_eX]

[DOI]

J. Supercomput., 2015

Automatic Generation of Optimized OpenCL Codes Using OCLoptimizer.

[BibT_eX]

[DOI]

Comput. J., 2015

Improving OpenCL Programmability with the Heterogeneous Programming Library.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2015

2014

Address independent estimation of the boundaries of cache performance.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2014

A fine-grained thread-aware management policy for shared caches.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2014

Writing Self-adaptive Codes for Heterogeneous Systems.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2014 Parallel Processing, 2014

2013

Numerical simulation of pollutant transport in a shallow-water system on the Cell heterogeneous processor.

[BibT_eX]

[DOI]

J. Supercomput., 2013

Accurate prediction of the behavior of multithreaded applications in shared caches.

[BibT_eX]

[DOI]

Parallel Comput., 2013

OCLoptimizer: An Iterative Optimization Tool for OpenCL.

[BibT_eX]

[DOI]

Jorge F. Fabeiro

Proceedings of the International Conference on Computational Science, 2013

2012

Static analysis of the worst-case memory performance for irregular codes with indirections.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

Using an Analytical Model of Shared Caches for Selecting the Optimal Parallelization Scheme.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012

2011

An efficient parallel set container for multicore architectures.

[BibT_eX]

[DOI]

Álvaro de Vega

Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

2010

Address-Independent Estimation of the Worst-case Memory Performance.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2010

2009

Static Prediction of Worst-Case Data Cache Performance in the Absence of Base Address Information.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009

Task-Parallel versus Data-Parallel Library-Based Programming in Multicore Systems.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro International Conference on Parallel, 2009

2007

Precise automatable analytical modeling of the cache behavior of codes with indirections.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2007

Automated and accurate cache behavior analysis for codes with irregular access patterns.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2007

2006

Analytical modeling of codes with arbitrary data-dependent conditional structures.

[BibT_eX]

[DOI]

J. Syst. Archit., 2006

Cache Behavior Modelling for Codes Involving Banded Matrices.

[BibT_eX]

[DOI]

Proceedings of the Languages and Compilers for Parallel Computing, 2006

2005

Optimal Tile Size Selection Guided by Analytical Models.

[BibT_eX]

M. G. Carmueja

Proceedings of the Parallel Computing: Current & Future Issues of High-End Computing, 2005

2004

Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures.

[BibT_eX]

[DOI]

Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003

Cache Behavior Modeling of Codes with Data-Dependent Conditionals.

[BibT_eX]

[DOI]