Dipali Jain

Orcid: 0009-0004-4727-8058

According to our database1, Dipali Jain authored at least 6 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Structural Reconstruction of Analog Circuits Using Graph Neural Networks and Transformers.
Proceedings of the 44th IEEE VLSI Test Symposium, 2026

2025
Improving Error Tolerance and Scalability in Pseudo-Boolean SAT-based Generic Side-Channel Analysis.
Proceedings of the IEEE International Test Conference, 2025

Trojan Localization in Generic AMS Circuits from Combined Power and Functional Queries.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2025

A Hybrid Machine Learning and Numeric Optimization Approach to Analog Circuit Deobfuscation.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
Towards Machine-Learning-based Oracle-Guided Analog Circuit Deobfuscation.
Proceedings of the IEEE International Test Conference, 2024

On Hardware Trojan Detection using Oracle-Guided Circuit Learning.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024


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