Drew C. Ness

According to our database1, Drew C. Ness authored at least 6 papers between 2007 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2008
Statistically translating low-level error probabilities to increase the accuracy and efficiency of reliability simulations in hardware description languages.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

Guiding Circuit Level Fault-Tolerance Design with Statistical Methods.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Improving nanoelectronic designs using a statistical approach to identify key parameters in circuit level SEU simulations.
Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007

MEMESTAR: A Simulation Framework for Reliability Evaluation over Multiple Environments.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Exploring subsets of standard cell libraries to exploit natural fault masking capabilities for reliable logic.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Scaling Analytical Models for Soft Error Rate Estimation Under a Multiple-Fault Environment.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007


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