Eleni Kanellou

According to our database1, Eleni Kanellou authored at least 15 papers between 2012 and 2023.

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Bibliography

2023
Exploring Trade-Offs in Partial Snapshot Implementations.
Proceedings of the Stabilization, Safety, and Security of Distributed Systems, 2023

2021
Integrating Integrated Assessment Modelling in Support of the Paris Agreement: The I2AM PARIS Platform.
Proceedings of the 12th International Conference on Information, 2021

Trace-Based Workload Generation and Execution.
Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020
Efficient Partial Snapshot Implementations.
CoRR, 2020

Staleness and Local Progress in Transactional Memory.
Proceedings of the Networked Systems - 8th International Conference, 2020

2019
An Efficient Universal Construction for Large Objects.
Proceedings of the 23rd International Conference on Principles of Distributed Systems, 2019

2018
GPU Provisioning: The 80 - 20 80 - 20 Rule.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018

2016
WFR-TM: Wait-free readers without sacrificing speculation of writers.
J. Parallel Distributed Comput., 2016

Efficient Distributed Data Structures for Future Many-Core Architectures.
Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016

2015
Data Structures for Current Multi-core and Future Many-core Architectures. (Structures de données pour des architectures multi-cœur actuelles et de futures architectures many-cœur).
PhD thesis, 2015

Wait-Free Concurrent Graph Objects with Dynamic Traversals.
Proceedings of the 19th International Conference on Principles of Distributed Systems, 2015

Algorithmic Techniques in STM Design.
Proceedings of the Transactional Memory. Foundations, Algorithms, Tools, and Applications, 2015

Consistency for Transactional Memory Computing.
Proceedings of the Transactional Memory. Foundations, Algorithms, Tools, and Applications, 2015

2014
Consistency for Transactional Memory Computing.
Bull. EATCS, 2014

2012
STM Systems: Enforcing Strong Isolation between Transactions and Non-transactional Code.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2012


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