Fathi M. A. Salam

According to our database1, Fathi M. A. Salam authored at least 23 papers between 1988 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

1999
The state space framework for blind dynamic signal extraction and recovery.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Modified cellular neural network architecture for integrated image sensing and processing.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
Analog Dendro-Dendritic Arrays with Digital On-Chip Learning.
J. Circuits Syst. Comput., 1998

Two Cellular Architectures for Integrated Image Sensing and Processing on a Single Chip.
J. Circuits Syst. Comput., 1998

1997
Modeling of a plasma processing machine for semiconductor wafer etching using energy-functions-based neural networks.
IEEE Trans. Control. Syst. Technol., 1997

1996
Implementation and Experimental Results of a Chip for the Separation of Mixed and Filtered signals.
J. Circuits Syst. Comput., 1996

Real-time tracking control using modular neural chips with on-chip learning.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Using neural networks to control the process of plasma etching and deposition.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996

1995
An Adaptive Neuro/Fuzzy CMOS Chip.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Implementation and Test Results of a Chip for the Separation of Mixed Signals.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Subthreshold Analog Circuit for Computing the Maximum Principal Component of 3-D Data.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Analog CMOS Implementation of Neural Network for Adaptive Signal Processing.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Computationally-improved Optimal Filtering for Supervised Learning.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
An adaptive network for blind separation of independent signals.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Parameter determination for an implementable feedback neural network.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Persistence of equilibria under weight variation of feedback continuous-time neural network.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

An analytical learning algorithm for the dendro-dendritic artificial neural network via linear programming.
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993

1991
A real-time experiment using a 50-neuron CMOS analog silicon chip with on-chip digital learning.
IEEE Trans. Neural Networks, 1991

A new feedback neural network with supervised learning.
IEEE Trans. Neural Networks, 1991

Analog MOS Vector Multipliers for the Implementation of Synapses in Artificial Neural Networks.
J. Circuits Syst. Comput., 1991

1990
Dynamics of feedback neural nets with unsupervised learning.
Proceedings of the IJCNN 1990, 1990

A feedback neural network with supervised learning.
Proceedings of the IJCNN 1990, 1990

1988
A formulation for the design of neural processors.
Proceedings of International Conference on Neural Networks (ICNN'88), 1988


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