Feiran Lei

Orcid: 0000-0003-4158-1457

According to our database1, Feiran Lei authored at least 6 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Reference Injected Phase-Locked Loops (PLL-RIs).
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A low noise, inductor-less, integer-N RF synthesizer using phase-locked loop with reference injection (PLL-RI).
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2013
A preliminary study of the Coherent Phase Synchronous Oscillator (CPSO) for Phase-Locked Loop (PLL) applications.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Gold nanoplot hot spots simulation and imaging.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
Adaptive slope and threshold companding technique for PAPR reduction in OFDM systems.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

A RF/DC current-mode detector for BiST and digital calibration of current-driven mixers.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012


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