G. Chitrakala

According to our database¹, G. Chitrakala authored at least 2 papers between 2018 and 2020.

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2020

Normally Bypassed Cascaded Sources Multilevel Inverter with RGA Optimization for Reduced Output Distortion and Formulaic Passive Filter Design.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2020

2018

A Segmented Ladder-Structured Multilevel Inverter for Switch Count Remission and Dual-Mode Savvy.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2018