G. Russell

According to our database, G. Russell authored at least 7 papers between 1985 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2004

A Comparative Study of the Design of Synchronous and Asynchronous Self-Checking RISC Processors.

Peter D. Hyde, G. Russell

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

ASSEC: An Asynchronous Self-Checking RISC-based Processor.

Peter D. Hyde, G. Russell

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

1999

ADOLT - An ADaptable On - Line Testing Scheme for VLSI Circuits.

Ali Maamar, G. Russell

Proceedings of the 1999 Design, 1999

1998

A 32-Bit Risc Processor with Concurrent Error Detection.

Ali Maamar, G. Russell

Proceedings of the 24th EUROMICRO '98 Conference, 1998

1996

A digital method for testing embedded switched capacitor filters.

M. Robson, G. Russell

Proceedings of the conference on European design automation, 1996

1992

CAD accelerators: A P Ambler, P Agrawal and W R Moore (Eds.) Elsevier, Netherlands (1991), 300 pp, ISBN 0444889647.

G. Russell

Comput. Aided Des., 1992

1985

2-D Array processor having a controlled pipelined architecture for elliptical sparse matrices.

Costas E. Goutis, J. S. Sheblee, G. Russell

Proceedings of the IEEE International Conference on Acoustics, 1985