Gerry C. T. Leung

According to our database, Gerry C. T. Leung authored at least 5 papers between 2002 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2006

A 1-V 24-GHz 17.5-mW phase-locked loop in a 0.18-μm CMOS process.

Alan W. L. Ng, Gerry C. T. Leung, Ka-Chun Kwok, Lincoln Lai Kan Leung, Howard C. Luong

IEEE J. Solid State Circuits, 2006

2004

A 1-V 5.2-GHz CMOS synthesizer for WLAN applications.

Gerry C. T. Leung, Howard C. Luong

IEEE J. Solid State Circuits, 2004

2003

A 1-V 5.2-GHz 27.5-mW fully-integrated CMOS WLAN synthesizer.

Gerry C. T. Leung, Howard C. Luong

Proceedings of the ESSCIRC 2003, 2003

A 1-V 13-mW 2.5-GHz double-rate phase-locked loop with phase alignment for zero delay.

Gerry C. T. Leung, Howard C. Luong

Proceedings of the ESSCIRC 2003, 2003

2002

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer.

Toby Kwok-Kei Kan, Gerry C. T. Leung, Howard C. Luong

IEEE J. Solid State Circuits, 2002