Giancarlo Patino

Orcid: 0000-0003-2747-5578

According to our database1, Giancarlo Patino authored at least 2 papers between 2015 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Reduced power consumption in the FPGA-based Universal Link for LVDS communications.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2015
Hardware implementation of a FPGA-based universal link for LVDS communications.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015


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