Guido Belfiore

Orcid: 0000-0002-4741-7909

According to our database1, Guido Belfiore authored at least 13 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
A High-Speed 130-nm SiGe BiCMOS Integrated Duobinary Driver for Data Rate Capacity Enhancement in VCSEL-Based Optical Links.
IEEE Access, 2024

2022
A Low-Distortion Modulator Driver With Over 6.5-V<sub>pp</sub> Differential Output Swing and Bandwidth Above 60 GHz in a 130-nm SiGe BiCMOS Technology.
IEEE Access, 2022

2018
A 4×45 Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation.
IEEE J. Solid State Circuits, 2018

Comparison of Segmented and Traveling-Wave Electro-Optical Transmitters Based on Silicon Photonics Mach-Zehnder Modulators.
Proceedings of the Photonics in Switching and Computing, 2018

A 30 Gb/s High-Swing, Open-Collector Modulator Driver in 250 nm SiGe BiCMOS.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

40 Gbit/s 4-PAM VCSEL Driver Circuit With Power Roll-off Compensation.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017
A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver.
IEEE J. Solid State Circuits, 2017

High-impedance multi-conductor transmission-lines for integrated applications at millimeter-wave frequency.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

A SiGe HBT limiting amplifier for fast switching of mm-wave super-regenerative oscillators.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

25 Gbit/s adaptive 3-tap FFE VCSEL driver in 28-nm CMOS for data center communications.
Proceedings of the 2017 19th International Conference on Transparent Optical Networks (ICTON), 2017

2015
170 GHz SiGe-BiCMOS Loss-Compensated Distributed Amplifier.
IEEE J. Solid State Circuits, 2015

Design of a 56 Gbit/s 4-level pulse-amplitude-modulation inductor-less vertical-cavity surface-emitting laser driver integrated circuit in 130 nm BiCMOS technology.
IET Circuits Devices Syst., 2015

A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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