H. V. Ravish Aradhya

Orcid: 0000-0003-3076-9120

According to our database1, H. V. Ravish Aradhya authored at least 4 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Secondary Throughput Maximization for an UAV-Based Cooperative Jammer in RIS-Aided Energy Harvesting in Secured Cognitive Radio Networks.
IEEE Open J. Commun. Soc., 2026

2025
A Novel Algorithm for Aspect Ratio Estimation in SRAM Design to Achieve High SNM, High Speed, and Low Leakage Power.
IEEE Access, 2025

2024
A Novel TriNet Architecture for Enhanced Analog IC Design Automation.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024

Hardware in loop network simulators - An insight overview.
Int. J. Model. Simul. Sci. Comput., February, 2024


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