Hanzhang Cao

According to our database, Hanzhang Cao authored at least 5 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 14.0-to-17.3GHz Inter-Core 1^st&2^nd Harmonics Co-Circulation Quad-Core Inverse Class-F Oscillator Achieving 199.1dBc/Hz Peak FoM in 65nm CMOS.

Junnan Guan, Hanzhang Cao, Jin Jin, Wen Wu, Tongde Huang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2026

2025

A Trifilar Transformer-Based Class-F₂₃ VCO With Noise-Circulating Technology.

Hanzhang Cao, Sichen Gao, Tongde Huang, Xiaolong Liu, Hao Wang, Jin Jin, Wen Wu

IEEE Trans. Very Large Scale Integr. Syst., August, 2025

34.5 An 18.5-to-23.6GHz Quad-Core Class-F23 Oscillator Without 2nd/3rd Harmonic Tuning Achieving 193dBc/Hz Peak FoM and 140-to-250kHz 1/f³PN Corner in 65nm CMOS.

Hanzhang Cao, Sichen Gao, Jin Jin, Xiaolong Liu, Wen Wu, Tongde Huang

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 24.6-to-30.6GHz Magnetic-Isolated Sub-Sampling PLL with a Fast-Locking FLL Achieving 64.9fs Jitter, -253.3dB FoMJ, and -69.1dBc Reference Spur in 65nm CMOS.

Hanzhang Cao, Chuqiao Wang, Yanwei Liu, Wen Wu, Tongde Huang, Xiaolong Liu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2023

A 5.2GHz Trifilar Transformer-Based Class-F23 Noise Circulating VCO with FoM of 192.6 dBc/Hz.

Hanzhang Cao, Tongde Huang, Xiaolong Liu, Hao Wang, Jin Jin, Wen Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023