Harikrishna Veldandi

Orcid: 0000-0002-6331-2832

According to our database1, Harikrishna Veldandi authored at least 3 papers between 2017 and 2018.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Design procedure for multifinger MOSFET two-stage OTA with shallow trench isolation effect.
IET Circuits Devices Syst., 2018

A 0.3-V Pseudo-Differential Bulk-Input OTA for Low-Frequency Applications.
Circuits Syst. Signal Process., 2018

2017
An Ultra-Low-Voltage Bulk-Driven Analog Voltage Buffer with Rail-to-Rail Input/Output Range.
Circuits Syst. Signal Process., 2017


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