Harreez M. Villaruz

According to our database, Harreez M. Villaruz authored at least 5 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Dual Mode Output Capacitorless Low Dropout with Low Quiescent Current for Hearing Aid Applications.

Dale Matthew D. Legaspi, Neil F. Mora, Nieva M. Mapula, Thesa L. Vergara, Emrys Leowhel T. Oling, Harreez M. Villaruz, Gene Fe P. Palencia, Rochelle M. Sabarillo, Kevin O. Maglinte

Proceedings of the IEEE Region 10 Conference, 2024

High Speed Low Power Dynamic CMOS Comparator for SAR ADCs.

Jazzmyne Rona M. Agustin, Harreez M. Villaruz, Nieva M. Mapula, Gene Fe P. Palencia

Proceedings of the IEEE Region 10 Conference, 2024

A 2μA Quiescent Current Output-Capacitorless LDO with Adaptive Power Transistors for Low Power Management in Energy Harvesting.

Jayson S. Abayan, Winston John F. Astillero, Dennis Von G. Itaas, Nieva M. Mapula, Harreez M. Villaruz, Gene Fe P. Palencia, Rochelle M. Sabarillo, Kevin O. Maglinte, Jefferson A. Hora

Proceedings of the IEEE Region 10 Conference, 2024

2023

Buck Converter with Variable Output Voltage for Dynamic Voltage Scaling (DVS) Applications.

Harreez M. Villaruz, Hong-Yi Huang, Nieva M. Mapula, Gene Fe P. Palencia

Proceedings of the 22nd International Symposium on Communications and Information Technologies, 2023

Design of Charge Pump for Low Power, Wide Range PLL in 65nm CMOS Technology.

Edwin C. Cuizon, Marven A. Yuson, Aileen B. Caberos, Nieva M. Mapula, Harreez M. Villaruz

Proceedings of the 22nd International Symposium on Communications and Information Technologies, 2023