Hassen Mestiri

Orcid: 0000-0001-7226-3975

According to our database1, Hassen Mestiri authored at least 11 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
An improvement of both security and reliability for elliptic curve scalar multiplication Montgomery algorithm.
Multim. Tools Appl., March, 2023

2022
An improvement of both security and reliability for AES implementations.
J. King Saud Univ. Comput. Inf. Sci., November, 2022

2020
A High-Speed KECCAK Architecture Resistant to Fault Attacks.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2016
A high-speed AES design resistant to fault injection attacks.
Microprocess. Microsystems, 2016

High Speed FPGA Implementation of Cryptographic KECCAK Hash Function Crypto-Processor.
J. Circuits Syst. Comput., 2016

High throughput pipelined hardware implementation of the KECCAK hash function.
Proceedings of the International Symposium on Signal, Image, Video and Communications, 2016

A reliable fault detection scheme for the AES hardware implementation.
Proceedings of the International Symposium on Signal, Image, Video and Communications, 2016

2015
An AOP-Based Fault Injection Environment for Cryptographic SystemC Designs.
J. Circuits Syst. Comput., 2015

Efficient FPGA hardware implementation of secure hash function SHA-256/Blake-256.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2012
Implementation of CPA analysis against AES design on FPGA.
Proceedings of the International Conference on Communications and Information Technology, 2012

Performances of the AES design in 0.18μm CMOS technology.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012


  Loading...