Hidehiko Kita

According to our database, Hidehiko Kita authored at least 15 papers between 1984 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Spiking Neural Network to Extract Frequent Words from Japanese Speech Data.

Kenta Morita, Haruhiko Takase, Naoki Morita, Hiroharu Kawanaka, Hidehiko Kita

Proceedings of the Knowledge-Based and Intelligent Information & Engineering Systems: Proceedings of the 23rd International Conference KES-2019, 2019

2018

Extraction of Frequent Sequential Patterns from Sequence at Uneven Intervals.

Kenta Morita, Haruhiko Takase, Masachika Sawamura, Naoki Morita, Hidehiko Kita

Proceedings of the 2018 Joint 10th International Conference on Soft Computing and Intelligent Systems (SCIS) and 19th International Symposium on Advanced Intelligent Systems (ISIS), 2018

2009

Obstacle to training SpikeProp networks - Cause of surges in training process -.

Haruhiko Takase, Masaru Fujita, Hiroharu Kawanaka, Shinji Tsuruoka, Hidehiko Kita, Terumine Hayashi

Proceedings of the International Joint Conference on Neural Networks, 2009

2008

Shape of error surfaces in SpikeProp.

Masaru Fujita, Haruhiko Takase, Hidehiko Kita, Terumine Hayashi

Proceedings of the International Joint Conference on Neural Networks, 2008

2007

Enhancing both generalization and fault tolerance of multilayer neural networks.

Haruhiko Takase, Masahiko Masahiko, Hidehiko Kita, Terumine Hayashi

Proceedings of the International Joint Conference on Neural Networks, 2007

Descriptive Answer Clustering System for Immediate Feedback.

Kazutaka Noro, Haruhiko Takase, Hidehiko Kita, Terumine Hayashi, Naoki Morita

Proceedings of the Supporting Learning Flow through Integrative Technologies, 2007

2006

Fault tolerant training algorithm for multi-layer neural networks focused on hidden unit activities.

Haruhiko Takase, Hidehiko Kita, Terumine Hayashi

Proceedings of the International Joint Conference on Neural Networks, 2006

Low Power Oriented Test Modification and Compression Techniques for Scan Based Core Testing.

Terumine Hayashi, Naotsugu Ikeda, Tsuyoshi Shinogi, Haruhiko Takase, Hidehiko Kita

Proceedings of the 15th Asian Test Symposium, 2006

2005

On Test Data Compression Using Selective Don't-Care Identification.

Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase

J. Comput. Sci. Technol., 2005

2004

Test data compression technique using selective don't-care identification.

Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Manipulation of hidden units activities for fault tolerant multi-layer neural networks.

Yusei Katsuda, Haruhiko Takase, Hidehiko Kita, Terumine Hayashi

Proceedings of the IEEE International Symposium on Computational Intelligence in Robotics and Automation: Computational Intelligence in Robotics and Automation for the New Millennium, 2003

2001

An enhanced fault model for high defect coverage.

Junzhi Sang, Tsuyoshi Shinogi, Haruhiko Takase, Hidehiko Kita, Terumine Hayashi

Syst. Comput. Jpn., 2001

2000

Evaluation Function for Fault Tolerant Multi-Layer Neural Networks.

Haruhiko Takase, Tsuyoshi Shinogi, Terumine Hayashi, Hidehiko Kita

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

1997

An enhanced iterative improvement method for evaluating the maximum number of simultaneous switching gates for combinational circuits.

Kai Zhang, Haruhiko Takase, Terumine Hayashi, Hidehiko Kita

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1984

Algebraic Specification Method of Programming Languages.

Hidehiko Kita, Toshiki Sakabe, Yasuyoshi Inagaki

Proceedings of the RIMS Symposia on Software Science and Engineering II, 1984