Hirotada Kuriyama

According to our database, Hirotada Kuriyama authored at least 3 papers between 1990 and 1993.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1993

A single-bit-line cross-point cell activation (SCPA) architecture for ultra-low-power SRAM's.

Motomu Ukita, Shuji Murakami, Tadato Yamagata, Hirotada Kuriyama, Yasumasa Nishimura, Kenji Anami

IEEE J. Solid State Circuits, November, 1993

1991

An 8 ns 4 Mb serial access memory.

Hirotada Kuriyama, Toshihiko Hirose, Shuji Murakami, Tomohisa Wada, Kore-aki Fujita, Yasumasa Nishimura, Kenji Anami

IEEE J. Solid State Circuits, April, 1991

1990

A 20-ns 4-Mb CMOS SRAM with hierarchical word decoding architecture.

Toshihiko Hirose, Hirotada Kuriyama, Shuji Murakami, Kojiro Yuzuriha, Takao Mukai, Kazuhito Tsutsumi, Yasumasa Nishimura, Yoshio Kohno, Kenji Anami

IEEE J. Solid State Circuits, October, 1990