Hsin-Hsiung Huang

Orcid: 0000-0001-7150-7229

According to our database1, Hsin-Hsiung Huang authored at least 19 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A framework of regularized low-rank matrix models for regression and classification.
Stat. Comput., February, 2024

2023
The properties of the positronium lifetime image reconstruction based on maximum likelihood estimation.
Bio Algorithms Med Syst., December, 2023

Unsupervised vessel trajectory reconstruction.
Frontiers Appl. Math. Stat., 2023

2022
Robust Regularized Low-Rank Matrix Models for Regression and Classification.
CoRR, 2022

2020
Robust discriminant analysis using multi-directional projection pursuit.
Pattern Recognit. Lett., 2020

The Unsupervised Method of Vessel Movement Trajectory Prediction.
CoRR, 2020

2019
Efficient parameter selection for support vector machines.
Enterp. Inf. Syst., 2019

2018
A Novel Real-Time Genome Comparison Method Using Discrete Wavelet Transform.
J. Comput. Biol., 2018

2017
Efficient parameter selection for SVM: The case of business intelligence categorization.
Proceedings of the 2017 IEEE International Conference on Intelligence and Security Informatics, 2017

2013
A Contest-Oriented Project for Learning Intelligent Mobile Robots.
IEEE Trans. Educ., 2013

2011
An iterative algorithm for robust kernel principal component analysis.
Neurocomputing, 2011

Wire Planning for Electromigration and Interference Avoidance in Analog Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

A Versatile Kit for Teaching Intelligent Mobile Robots.
Proceedings of the Next Wave in Robotics - 14th FIRA RoboWorld Congress, 2011

2010
Optimal Supply Voltage Assignment under Timing, Power and Area Constraints.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2008
Timing-driven obstacles-avoiding routing tree construction for a multiple-layer system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Timing-driven X-architecture router among rectangular obstacles.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
A congestion-driven buffer planner with space reservation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A new congestion and crosstalk aware router.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2002
Structural Decomposition with Functional Considerations for Low Power.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002


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