Huanzhi Pu

According to our database, Huanzhi Pu authored at least 8 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

CuLifter: Lifting GPU Binaries to Typed IR.

Jisheng Zhao, Huanzhi Pu, Shinnung Jeong, Chihyo Ahn, Hyesoon Kim

CoRR, April, 2026

AsyncSparse: Accelerating Sparse Matrix-Matrix Multiplication on Asynchronous GPU Architectures.

Jie Liu, Huanzhi Pu, Zhiru Zhang

CoRR, April, 2026

FastTrackGPU: Static-Analysis-Guided Analytical Modeling for Softcore GPUs.

Chihyo Ahn, Shinnung Jeong, Liam Paul Cooper, Ruobing Han, Huanzhi Pu, Nicholas Parnenzini, Jisheng Zhao, Blaise Tine, Hyesoon Kim

IEEE Comput. Archit. Lett., 2026

TensorDynamic: Bridging Application- and Instruction-Level Fault Injection for DNN Tensor Core Execution.

Yuxiao Jia, Euijun Chung, Huanzhi Pu, Ben Feinberg, Hyesoon Kim

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2026

Macsim Mini: A Lightweight Cycle-Level GPU Simulator for Architecture Education.

Euijun Chung, Saurabh Singh, Huanzhi Pu, Yuxiao Jia, Anurag Kar, Sam Jijina, Scott Madeira, Hyesoon Kim

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2026

Inside VOLT: Designing an Open-Source GPU Compiler (Tool).

Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine

Proceedings of the 35th ACM SIGPLAN International Conference on Compiler Construction, 2026

2025

Inside VOLT: Designing an Open-Source GPU Compiler.

Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine

CoRR, November, 2025

Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU.

Huanzhi Pu, Rishabh Ravi, Shinnung Jeong, Udit Subramanya, Euijun Chung, Jisheng Zhao, Chihyo Ahn, Hyesoon Kim

CoRR, May, 2025