Hung-Yue Tsai

According to our database1, Hung-Yue Tsai authored at least 3 papers between 2008 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
A low-latency GALS interface implementation.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A Quasi-Delay-Insensitive Microprocessor Core Implementation for Microcontrollers.
J. Inf. Sci. Eng., 2009

2008
A pipelined asynchronous 8051 soft-core implemented with Balsa.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008


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