Hyeon-Ji Choi
Orcid: 0000-0002-5038-9806
According to our database1,
Hyeon-Ji Choi authored at least 11 papers
between 2021 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2026
26.6 a 92.4%-Peak-Efficiency 48V to 0.8-to-1.6V Hybrid Converter with Inductor-Interleaved Fibonacci Switched-Capacitor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
A 94.8%-Peak-Efficiency Double Step-Up SIBO Converter Achieving 88% Output Ripple Reduction for AMOLED Display.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2025
A 0-to- 10μF Off-Chip Output Capacitor-Scalable Boost Converter Achieving 96.68% Peak Efficiency.
IEEE Solid State Circuits Lett., 2025
2024
A Simultaneous Energy Transferring SIBO Converter Achieving Low Ripple and High Efficiency for AMOLED Applications.
IEEE J. Solid State Circuits, May, 2024
8.7 A 92.7% Peak Efficiency 12V-to-60V Input to 1.2V Output Hybrid DC-DC Converter Based on a Series-Parallel-Connected Switched Capacitor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
An Ultra-Low Power Soft-Switching Self-Oscillating SIMO Converter for Implantable Stimulation Systems.
IEEE Trans. Ind. Electron., August, 2023
96.48% Peak-Efficiency Continuous-Current Step-Up Battery Charger (CC-SUBC) with Dual Energy-Harvesting Sources for Automotive Application.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 1V 20.7μW Four-Stage Amplifier Capable of Driving a 4-to-12nF Capacitive Load with >1.07MHz GBW with an Improved Active Zero.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error Amplifier.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
A High Slew-rate Wide-range Capacitive Load Driving Buffer Amplifier with Correlated Dual Positive Feedback Loops.
Proceedings of the 19th International SoC Design Conference, 2022
2021
An Output Capacitor-less Low-dropout Regulator using a Wide-range Single-stage Gain-boosted Error Amplifier and a Frequency-dependent Buffer with a Total Compensation Capacitance of 2.5 pF in 0.5 µm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021