Ian Brynjolfson

According to our database1, Ian Brynjolfson authored at least 3 papers between 2000 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2001
A new PLL design for clock management applications.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
FPGA clock management for low power applications (poster abstract).
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

Dynamic clock management for low power applications in FPGAs.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000


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