J. Greg Nash

According to our database1, J. Greg Nash authored at least 16 papers between 1985 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2014
High-throughput programmable systolic array FFT architecture and FPGA implementations.
Proceedings of the International Conference on Computing, Networking and Communications, 2014

2007
A High Performance Scalable FFT.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

A New Class of High Performance FFTs.
Proceedings of the IEEE International Conference on Acoustics, 2007

2005
Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2002
Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

1993
Heterogeneous Algorithms for Image Understanding Architecture.
Parallel Algorithms Appl., 1993

1991
Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks.
Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

1990
An overview of architecture research for image understanding at the University of Massachusetts.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

Straight-line detection on a gated-connection VLSI network.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

A multiple-level heterogeneous architecture for image understanding.
Proceedings of the Application Specific Array Processors, 1990

1989
Parallel implementation of synthetic aperture radar algorithms.
J. VLSI Signal Process., 1989

The image understanding architecture.
Int. J. Comput. Vis., 1989

1988
Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations.
IEEE Trans. Computers, 1988

1987
The Systolic/Cellular System for Signal Processing.
Computer, 1987

1985
A systolic/cellular computer architecture for linear algebraic operations.
Proceedings of the 1985 IEEE International Conference on Robotics and Automation, 1985

VLSI Implementation of a linear systolic array.
Proceedings of the IEEE International Conference on Acoustics, 1985


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