J. Praveen

Orcid: 0000-0002-8802-161X

According to our database1, J. Praveen authored at least 1 paper in 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
BIST-Based Low Power Test Vector Generator and Minimizing Bulkiness of VLSI Architecture.
J. Circuits Syst. Comput., 2018


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